Embodiment generally relate to electronic circuit designs, and more specifically to improvements in architectural arrangements which enable enhanced performance and/or features for direct sampling tuner, and specifically to direct conversion sampling receivers which include a successive approximation analog-to-digital converter (SAR-ADC) to enhance quality of sampling receivers, where the SAR-ADC incorporates a current redistribution digital-to-analog converter (DAC), with gain control.
Direct conversion sampling receivers (DSRs) are a relatively new realization and are highly suited to implementation on an ultra-high speed digital process since the receiver architecture eliminates the requirement for significant analogue circuits such as operational amplifier (op-amp) based continual time filters. DSRs are used in, for example, cable modems, satellite set top boxes, cable set top boxes, and the like. However, in many DSRs in order to compensate for a wide amplitude range of received signals, the input signals are subjected to amplitude adjustment using fine digital gain control (“FDGC”). FDGC allows for the selection and adjustment of gain to be applied to an input signal. Amplitude adjustment or so called gain adjustment of an incoming signal by an FDGC is used to achieve an amplitude level well above the noise and offset thresholds. Without the application of gain adjustment, it may not be feasible to perform further post processing of an incoming signal, such as adaptive equalization and digital conversion.
Many techniques are known for implementing fine digital gain control such as switched gm stages, field effect transistor (FET) switched R-2R ladders and the like. All these approaches have major disadvantages such as adding to thermal noise, intermodulation associated with the additional circuits, adding to circuit complexity, and since they are typically preceded by an amplifier stage with a fixed gain or with a small range of coarse gain steps the output amplitude will increase in sympathy with the input and so potentially lead to compression and further intermodulation distortion in the output.
Therefore, there is a need in the art for an architectural arrangement which substantially overcomes the aforementioned undesired characteristics.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals have been repeated among the figures to indicate corresponding or analogous elements.